1. Field of the Invention
The present invention relates to an image sensor and image sensing apparatus.
2. Description of the Related Art
Recently, image sensors used in image sensing apparatuses such as a digital still camera and high-quality video camera require a larger number of pixels in the pixel array. As the number of pixels of the pixel array increases, the image sensor sometimes reads out pixel signals from the pixel array via a plurality of channels in order to read them out at high speed.
Also, as the number of pixels of the pixel array increases, the size (area) of a pixel is sometimes decreased in the image sensor. In this case, the size (area) of an aperture region above a photodiode also decreases. Since the efficiency at which light entering a microlens reaches the light receiving surface of the photodiode decreases, the photodiode may have lower sensitivity.
According to a technique disclosed in Japanese Patent Laid-Open No. 2004-221532, a waveguide formed of a transparent material higher in refractive index than an interlayer insulation film is arranged between the light incident surface (microlens) of an image sensor and a photoelectric conversion unit (photodiode) in a solid-state image sensor. The width of the waveguide on the side of the light incident surface is larger than that on the side of the photoelectric conversion unit. According to Japanese Patent Laid-Open No. 2004-221532, this structure facilitates total reflection of light entering the waveguide by the interface between the waveguide and the interlayer insulation film. Hence, this technique can increase the efficiency at which light entering the microlens reaches the light receiving surface of the photodiode.
An example of the structure of each pixel in the pixel array of an image sensor 1 will be explained with reference to FIGS. 8 to 12. FIG. 8 is a plan view showing the layout of each pixel in the image sensor 1. FIG. 9 is a sectional view (sectional view in the x direction) taken along the line A-A in FIG. 8. FIG. 11 is a sectional view (sectional view in the y direction) taken along the line B-B in FIG. 8. In the following description, the x direction is the long-side direction of the pixel array, and the y direction is the short-side direction of the pixel array. However, it is also possible that the x direction is the short-side direction of the pixel array, and the y direction is the long-side direction of the pixel array. FIGS. 10 and 12 are sectional views for explaining problems in the image sensor 1.
In the image sensor 1, a photoelectric conversion unit 11 is formed in a silicon substrate 10. A gate electrode 30 of a transfer transistor 12 for transferring charges generated in the photoelectric conversion unit (photodiode) 11 to a charge-voltage converter (floating diffusion) is arranged at a position where the gate electrode 30 overlaps part of a light receiving surface 11a of the photoelectric conversion unit 11.
A first interlayer insulation film 21 formed of silicon oxide is arranged on the photoelectric conversion unit 11. A second wiring layer 31 is arranged on the first interlayer insulation film 21. A first wiring layer 32 is arranged on a second interlayer insulation film 22. Further, a third interlayer insulation film 23 is arranged to cover the first wiring layer 32.
The first wiring layer 32 and second wiring layer 31 (a multilayer wiring structure 33) define an aperture region OR1 above the photoelectric conversion unit 11. The first wiring layer 32 defines two contour sides ORS3 and ORS4 of the aperture region OR1 in the first direction. The second wiring layer 31 defines two contour sides ORS1 and ORS2 of the aperture region OR1 in the second direction. In the aperture region OR1, an optical waveguide 40 formed of silicon nitride is arranged. The width of the optical waveguide 40 on the side of the light incident surface is larger than that on the side of the photoelectric conversion unit. A planarized layer 50, color filter layer 51, planarized layer 52, and on-chip lens 53 are formed of resin materials above the optical waveguide 40.
In the cross section along the x direction shown in FIG. 9, the first wiring layer 32 includes two lines 32a and 32b per pixel. The two lines 32a and 32b of the first wiring layer 32 are formed at an interval ORL1 as large as possible so as not to cut off light entering the photoelectric conversion unit 11. Considering the manufacturing margin, the optical waveguide 40 and each of the two lines 32a and 32b are formed apart from each other at a predetermined interval s1 or more. A width W1 of a top face 40a of the optical waveguide 40 is determined by subtracting double the predetermined interval s1 from the interval ORL1 between the two contour sides ORS3 and ORS4.
More specifically, assuming that the taper angle of a side face 40c of the optical waveguide 40 is set to a predetermined angle, a dead space DS1 defined by the two lines 32a and 32b is a hatched region shown in FIG. 10. As for the cross section along the x direction, the width W1 of the optical waveguide 40 can be increased to the boundary of the dead space DS1.
In the cross section along the y direction shown in FIG. 11, the second wiring layer 31 includes two lines 31a and 31b per pixel. The two lines 31a and 31b are formed at an interval ORL2 as large as possible so as not to cut off light entering the photoelectric conversion unit 11. As described above, the gate electrode 30 of the transfer transistor 12 is arranged at a position where it overlaps part of the light receiving surface 11a of the photoelectric conversion unit 11. The gate electrode 30 is formed of polysilicon which absorbs part of visible light, and is arranged not to overlap a bottom face 40b of the optical waveguide 40.
Assume that it is required to make the gate electrode 30 overlap the light receiving surface 11a of the photoelectric conversion unit 11 by a predetermined length OL1 when viewed from the top, in order to increase the efficiency at which charges are transferred from the photoelectric conversion unit 11 to the charge-voltage converter. In this case, the edge portion of the bottom face 40b of the optical waveguide 40 needs to be positioned closer to a normal PL by the predetermined length s1 than the gate electrode 30 in order to ensure the manufacturing margin. For this reason, the interval between the optical waveguide 40 and each of the two lines 31a and 31b becomes a length s2 larger than the length s1 determined in consideration of the manufacturing margin. A width W2 of the optical waveguide 40 in the y direction is determined by subtracting double a predetermined interval s3 from the interval ORL2 between the two contour sides ORS1 and ORS2.
More specifically, assuming that the taper angle of the side face 40c of the optical waveguide 40 is set to a predetermined angle, a dead space DS2 defined by the two lines 31a and 31b should have been downsized as represented by a hatched region in FIG. 12A. However, the presence of the gate electrode 30 increases the dead space to a dead space D3 hatched in FIG. 12B, generating a wasteful space WS shown in FIG. 12C with respect to the two lines 31a and 31b. As a result, the width W2 of the optical waveguide 40 is narrowed more than necessary. The width W2 of the optical waveguide 40 cannot be increased to the boundary of the dead space DS2. The aperture (area of the top face 40a) of the entrance of the optical waveguide 40 becomes small, decreasing the quantity of light reaching the photoelectric conversion unit 11. That is, the efficiency at which incident light reaches the light receiving surface of the photoelectric conversion unit decreases.
If the width W2 of the optical waveguide 40 is increased to the boundary of the dead space DS2 in the cross section along the y direction, the length by which the gate electrode 30 overlaps the light receiving surface 11a becomes much shorter than the predetermined length OL1. In this case, the efficiency at which charges are transferred from the photoelectric conversion unit 11 to the charge-voltage converter decreases.